Revision # 1.30   Modifications made on June 7, 2010

• In the Flash Data Memory section, the Earse All Timing diagram was modified.
  
• The ERAL section was modified.

Revision # 1.20   Modifications made on May 20, 2010

• In the In-circuit Programming Interface section the diagram was modified.
  
• The Package Information section was modified.

Revision # 1.10   Modifications made on January 21, 2010

• In the Stack section, the number of stack levels was modified.
  
• In the SPI section the timing diagram was modified.
  
• The table for the register states was modified, particularly SIMC0 and SIMC1 register entries.
  
• The VOL Register diagram was modified.

Revision # 1.00   This was posted on May 12, 2009